high-accurate low-voltage analog cmos current divider modify by neural network and tlbo algorithm

a high accurate and low-voltage analog cmos current divider which operates with a single power supply voltage is designed in 0.18µm cmos standard technology. the proposed divider uses a differential amplifier and transistor in triode region in order to perform the division. the proposed divider is modeled with neural network while tlbo algorithm is used to optimize it. the proposed optimization method shows a close characteristic to the ideal current-input  voltage-output divider behavior over wide input range. by using the achieved results of the tlbo algorithm simulation results using hspice shows the maximum linearity error less than 0.5% .the total power consumption is below 0.14 mw with a single 1.5 v power supply. the proposed divider was laid out in standard 0.18µm cmos technology and shows high linearity .the output voltage offset is less than 3 mv under all situations. the proposed scheme has potential to be employed in modern high-performance low-voltage analog signal processing systems.